RISC-V is a free and open RISC instruction set architecture. and was originally developed in the Computer Science division of the EECS Department at the University of California, Berkeley
This course will talk a lot about RISC-V ISA from scratch, also including a section about why do we even need a computer architecture and how real-time day-to-day apps run on a computer, with examples.
What Will I Learn?
- Learn any computer ISA
- Learn to write short assembly language program for RISCV cpu core
- Learn how to define specifications of a system