FPGA Design the complete guide

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About Course

The objective of this course is to acquire proficiency with Field Programmable Gate Arrays FPGA Design for the purpose of creating prototypes or products for a variety of applications. Although FPGA design can be a complex topic, we will introduce it so that, with a little bit of effort, the basic concepts will be easily learned, while also providing a challenge for the more experienced designer. We will explore the complexities, capabilities, and trends of Field Programmable Gate Arrays (FPGA) and Complex Programmable Logic Devices (CPLD). Conception, design, implementation, and debugging skills will be practiced. We will learn specifics around embedded IP and processor cores, including tradeoffs between implementing versus acquiring IP. Projects will involve the latest software and FPGA development tools and hardware platforms to help develop a broad perspective of the capabilities of various Programmable SoC solutions. Topics include:

  1. Verilog, VHDL, and RTL design for FPGA and CPLD architectures
  2. FPGA development tools flow: specify, synthesize, simulate, compile, program, and debug
  3. Configurable embedded processors and embedded software
  4. Use of soft-core and hard-core processors and OS options
  5. FPGA System engineering, software-hardware integration, and testing
  6. IP development and incorporating 3rd-party IP

 

Who this course is for:

  1. Anyone who wants to learn FPGA design.
  2. Arduino Makers who want to take the next step into embedded systems.
  3. Hardware engineers who would like to learn about the exciting field of FPGA design
  4. This course is not for experienced embedded engineers specialized in FPGAs.
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What Will You Learn?

  • Create in the FPGA a working system on a chip design with Nios II soft processor, RAM and FLASH memory, and several peripherals.
  • Understand and practice all aspects of FPGA development, including conception, design, implementation, and debugging.
  • Understand the rationale for each phase of the hardware development flow, including fitting, timing constraints, simulation, and programming.
  • Apply hierarchical design methods to create bigger designs in VHDL or Verilog

Course Content

FPGA Design for Embedded Systems

  • Course OverviewLesson
    00:00
  • Programmable logic and FPGA design
    00:00
  • A Brief History of Programmable Logic
    00:00
  • CPLD Architecture
    00:00
  • LUTs and FPGA Architecture
    00:00
  • LUTs for Logic Design
    00:00
  • Designing Adders
    00:00
  • Designing Multipliers
    00:00
  • FPGA Design Flow
    00:00
  • Downloading Quartus Prime
    00:00
  • Installing Quartus Prime
    00:00
  • Introducing Quartus Prime
    00:00
  • Create a design in Quartus Prime
    00:00
  • Compile a Design
    00:00
  • View the RTL
    00:00
  • Timing Analysis with Time Quest I
    00:00
  • Timing Analysis with Time Quest II
    00:00
  • Simulate a design with ModelSim
    00:00
  • Many types of FPGAs
    00:00
  • Xilinx CPLD Architecture
    00:00
  • Xilinx Small FPGAs
    00:00
  • Xilinx Large FPGAs
    00:00
  • Altera CPLDs and Small FPGAs
    00:00
  • Altera Large FPGAs
    00:00
  • Microsemi Single chip FPGA solutions
    00:00
  • Lattice Single Chip FPGA solutions
    00:00
  • FPGA Design Expertise
    00:00
  • Advanced Schematic Entry for FPGA Design Drawing and Hierarchy
    00:00
  • Improving Productivity with IP Blocks
    00:00
  • Improving Timing with Pipelining
    00:00
  • FPGA IO Getting In and Getting Out
    00:00
  • Pin Assignments Making them Spot On!
    00:00
  • Programming the FPGA
    00:00
  • Becoming one with Q Qsys System Design
    00:00
  • Becoming one with Q Part II Qsys System Design Finishing Touches
    00:00
  • Becoming one with Q Part III Qsys System Design Finishing Touches
    00:00

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