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Computer Organization & Architecture

  • Course level: All Levels

Description

Computer Organization & Architecture (COA) is a core course in the curricula of Computer Sciences as well as Electronics and Electrical Engineering disciplines at the second-year level in most of the Indian universities and technical institutions. This is the first course in Computer Organization & Architecture and the course would provide students with an understanding of the design of fundamental blocks used for building a computer system and interfacing techniques of these blocks to achieve different configurations of an “entire computer system”.

This Computer Organization & Architecture course will be developed and taught with respect to Objectives based on Bloom’s Taxonomy. First, we will highlight the main objectives the course is aimed to achieve. Following that, at each module, we will specify the module level objectives and demonstrate how these objectives meet the course level main goals in unison. At the leaf level i.e., the units, we will point to the specific objectives of the lecture.

Also, it will be demonstrated how the unit level objectives satisfy the parent module level objectives. Further, each module will have a module-level problem that needs concepts of all the units therein to solve. Finally, a comprehensive course-level problem related to the design of the “entire computer system” will be discussed which meets all the course-level objectives.

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What Will I Learn?

  • Computer Architecture
  • Computer Fundamental
  • Computer Science
  • IT
  • Software

Topics for this course

52 Lessons

Computer Organization & Architecture

Basics of Computer System00:00:00
Components of Computer00:00:00
CPU Registers00:00:00
Micro-Operations00:00:00
Instructions in Computer Architecture -100:00:00
IO Organization00:00:00
DMA and Magnetic Disk00:00:00
Instructions in Computer Architecture -200:00:00
Addressing Mode – 100:00:00
Addressing Mode – 200:00:00
Addressing Mode – 300:00:00
Addressing Mode – 400:00:00
Introduction to CPU00:00:00
ALU & Data Path00:00:00
Control Unit, Control Word, Control Unit Organization00:00:00
Types of Control Unit00:00:00
Nano-programmed Control Unit00:00:00
IO Organization – 100:00:00
IO Organization – 200:00:00
IO Organization – 300:00:00
IO Organization – 400:00:00
DMA Modes and Problems on IO00:00:00
Memory Organization: Introduction00:00:00
Memory Organization: Main Memory & Memory Chips00:00:00
Memory Organization: Memory Chip00:00:00
Memory Organization: Multiple Chip Support00:00:00
Memory Organization: Associative Memory, Locality of Reference00:00:00
Memory Organization: Cache Memory00:00:00
Memory Organization: Cache Memory 200:00:00
Cache Mapping: Direct Mapping – 100:00:00
Cache Mapping: Direct Mapping – 200:00:00
Cache Mapping: Cache Initialization00:00:00
Cache Mapping: Set Associative Mapping & Fully Associative Mapping00:00:00
Cache Mapping: Hardware Implementation of Mapping00:00:00
Cache Mapping: Cache Block Replacement00:00:00
Cache Mapping: Types of Cache Misses00:00:00
Computer science MultiLevel Cache00:00:00
Practice Questions on Cache Memory – 100:00:00
Complex Problems on Instructions (COA)00:00:00
Practice Questions on Cache Memory – 200:00:00
Magnetic Disk: Disk Platter, Track, Sector, Disk Access Time00:00:00
Magnetic Disk: Disk Access Time, Disk Addressing00:00:00
Revision: Addressing Modes (COA)00:00:00
DPP on Magnetic Disk00:00:00
Parallel Processing, Flynn’s Classification & Pipelining00:00:00
DPP on Synchronous Pipeline & Pipeline00:00:00
Instruction Pipeline, Pipeline Hazards00:00:00
Pipeline Hazards & Data Hazard Classifications: RAW, WAW, WAR00:00:00
DPP: Instruction Pipeline00:00:00
Non-Linear Pipeline00:00:00
Floating Point Representation: Conventional00:00:00
Floating Point Representation: IEEE – 754 Representation00:00:00
Computer Organization & Architecture
40 £

Enrolment validity: Lifetime

Requirements

  • No prerequisite for this course - I will teach you everything